(1) It is used to identify the active device signal out of multiple devices/signals. At a time only one of the input is active and this active input is recognized by a bit pattern on the output lines. It is basically the reverse of a decoder so it has 2 N inputs and N outputs. (4) It is used as a Binary to decimal converter which is shown in figure (3) ft is used as a Device number decoder. (2) It is used as a Port address decoder. So for each input bit pattern, one output line is there, it is shown in Table. At a time only one output line is active and this output line is decided by input bit pattern, is shown in figure In decoder, there are N input lines and 2 N output lines. Multiplexing and Demultiplexing is used in telephonic talk (2) One example of Demultiplexer is in serial to parallel conversion of data in the floppy controller or Hard disk controller during a read operation which is shown in (1) It is used as serial to parallel converter in parallel communication. At DP so many subscribers are connected with this DP but the transmission line contained only with one cable for transmitting many signals so with the help of multiplexer these many signals are converted into one and transmitted.Īgain at DP, this one signal is divided into many individual signals by using the dimultiplexer circuit thus in this manner we can communicate with telephone. This concept is utilized in these logic circuit which are used at the receiver end to differentiate the one signal into many like a telephone line. Thus giving Y 3=I 0 and all other output like Y 0 Y 1 Y 2 are in low state. (2) Control bit AB-11 then fourth AND gate is enabled and other AND gates are disabled so the input bit I 0 is transmitted only to the Y 3 output. (1) Control bit AB=01 then the second AND gate is enabled and other AND gates are disabled so the input bit I 0 is transmitted only to the Y, output, thus given Y 1=I 0 This input bit is transmitted to data bit of the all outputs but control bits decide one output bit like is Here only one input I 0 is given and four output Y 0 Y 1 Y 2 and Y 3 are shown in figure
Then CRT controller’s address is selected.ĭemultiplexer means only one source (input) with many destinations (outputs) so it is used as a data discriminator circuit.” It is a logic circuit of one input with many outputs& control signals decide that which one output will be enabled &which data bit is transmitted. Here for each address bit a 2 to 1 multiplexer is required in which the select input A=0, then CPU’s address is selected and A=1. (2) One practical example of Multiplexer is memory addressing for the video memory in which the memory is shared to both the CPU (8088) and the CRT controller (6845), it is shown in figure. (1) It is used as a parallel to serial converter in serial communication.
This concept is broadly utilized in the transmission of signals or in communications where so many signals are transmitted in the form of one signal while at other receiver end it is demultiplexed at (i.e. In multiplexer, At any time there are so many inputs but only one output. t makes the output with the help of input I 0 ) and all the other gates are disabled (So their inputs have not any output) and all the outputs of all gates are ORED by an OR gate so we have only one output out of four inputs. Now the only one AND gate is enabled (i.e. I 0 is low then Y (output) is low & I 0 is high then Y is high. So in this case only I 0 is able to transmit the number at output. So first AND gate is enable while all the other AND gates are disabled. When we have fed any two control bits like 00. “Multiplexer means many sources (inputs) with one Destination (output) so it is used as a data selector circuit.” It seems that all the message are sent in parallel but infect a sample of one message is transmitted within its allocated time and a sample of another message after that so all the samples are transmitted sequentially but very fast and all the samples of any one message is reassembled at receiving and so each user seems like all processes are done simultaneously quantum of time is allocated to each signal during a definite interval). In this method, the available time is divided into available input signals (i.e.
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